1. Field of the Invention
The present invention relates to a method for driving a solid state imaging device. More particularly, the present invention relates to a method for driving a solid state imaging device using a charge coupled device (CCD), a solid state imaging device having a structure for performing this method, and a camera using this solid state imaging device.
2. Description of the Prior Art
The driving of solid state imaging devices using CCDs lets the solid state imaging device read out signal charges, generated by a photodiode's ability to convert photons into electrons, from the photodiode into a vertical transfer region, transfer the signal charges in the vertical transfer region (this is called “vertical transfer” in the following), and then transfer them in a horizontal transfer region (this is called “horizontal transfer” in the following).
The following is an explanation of a conventional driving method, referring to the accompanying drawings. First of all, the solid state imaging device referred to in the explanations of this conventional driving method is explained with FIG. 31 and FIG. 32, which is a partial cross-section taken along V—V in FIG. 31. This solid state imaging device includes two vertical transfer electrodes 171 for each photodiode (light-receiving portion) 110 (for example, the two electrodes 122 and 123 are both associated with the same photodiode). The electrodes 121, 122, . . . , 127, . . . are connected to wires, so that during the vertical transfer of the signal charges, one of the voltage patterns φV101–φV104 is applied to them. Depending on these predetermined voltage patterns applied through an insulating film 118 formed on the substrate, signal charges are transferred in the vertical transfer region 117 formed in a p-well 116 of an n-type silicon substrate 115. Then, the signal charges are transferred in the horizontal transfer region 112, until they reach an output amplifier 113.
FIG. 33 shows conventional voltage patterns applied to the vertical transfer electrodes 171 in the solid state imaging device shown in the drawings. The voltage patterns φV101–φV104 are achieved by holding voltages selected from a high voltage VH, a medium voltage VM and a low voltage VL for certain periods of time (in the drawings, these voltages are denoted by the letters “H”, “M” and “L”; the same holds true for the following). By applying these voltage patterns to the vertical transfer electrodes 171, the potential in the vertical transfer region changes as shown in FIG. 34.
Referring to FIG. 34, the following is an explanation of the transfer of the signal charges brought about by this change of potential. First of all, at the time t2, the voltage pattern φV101 applies a high voltage VH to the electrodes 123 and 127, and due to the resulting potential increase in the vertical transfer regions below the electrodes 123 and 127, signal charges 101 that have accumulated in the photodiodes 110 are read out. At the time t2, the signal charges 101 are read out from every other photodiode, with respect to the vertical transfer direction. On the other hand, the signal charges 102 accumulated in the remaining photodiodes are read out at the time t5. The signal charges 101 and 102 are mixed at the time t7, and transferred in the vertical transfer region as a signal charge 103 corresponding to two photodiodes. As is shown in FIG. 34, the signal charge read out by the electrode 123 is mixed with the signal charge read out by the electrode 121.
The vertical transfer of charges represents a first field (Field A), and subsequently a second field (Field B) is performed. While it is not shown in the drawings, another combination different from the Field A is used for the mixing of the signal charges 101 and 102 in the Field B. Thus, in the Field B, the signal charge read out with the voltage applied to the electrode 123 is mixed at the time t7 with the signal charge on the opposite side, read out with the voltage applied to the electrode 125.
However, in the course of making the solid state imaging device smaller and increasing the number of pixels, to sustain its so-called saturation characteristics, it is desirable to increase the charge amount that can be handled per unit area in the vertical transfer region. As becomes clear from FIG. 32, to increase the signal charge that can be handled in the vertical transfer region 117, it is advantageous if the thickness of the insulating film (gate insulating film) 118 used as the dielectric is thin, which is analogous to trying to increase the capacity of a capacitor.
However, when the thickness of the insulating film is reduced, then noise increases in the solid state imaging device, and the transfer efficiency of the signal charges deteriorates. This may lead to an avalanche breakdown of the silicon. That is to say, as the insulating film becomes thinner, the electric fields in the substrate increase, which ultimately leads to electric fields large enough to cause avalanche breakdown of the silicon. A part of the charge generated by such an avalanche breakdown is an unnecessary charge including noise (causing noise in the form of white marks on the image). Another portion of the generated charge is knocked into the insulating film and creates an uneven potential in the vertical transfer region, lowering the transfer efficiency of the signal charge.
Furthermore, to reduce the consumed energy of the solid state imaging device, it is desirable to drive the device at low voltages, so that the peak potential of the read-out voltage pulses should be low. However, simply lowering the read-out voltage may lead to read-out residues of the signal charges. In particular, with a device, in which the photodiodes are formed in a p-type layer formed in an n-type substrate, a higher read-out voltage is necessary, because of the potential variations in the p-type layer caused by the electrical resistance of the p-type layer.